Smallest Transistor Built with 1-Nanometre Carbon Nanotube Gate
A team of researchers from Berkeley labs has finally broken the scaling limit of 5 nm gate lengths. This breakthrough has set the first foundation stones for the upcoming processors in the future, keeping Moore’s law alive for a little longer.
Why the 5 nm limit?
On the fundamental level, a transistor works by switching the current through the silicon on and off between the source and a drain, responding to the voltage applied to the gate. As we reduce the size of these gates and pack them closer and closer, we tend to approach a quantum problem when the size of the gate approaches five nm. Below this limit, the flow of electrons cannot be stopped. This is due to the quantum mechanical phenomenon known as quantum tunnelling, where the electron simply tunnels from the source to the drain even without the voltage applied to the gate, making it impossible to turn the transistor off. Besides this, the tunnelling also occurs from one gate to the other due to the closed packing, causing havoc.
The 1 nm transistor breakthrough
This particular transistor is built with 1 nm hollow carbon nanotubes as the gate, zirconium dioxide as the insulator, and molybdenum disulphide as the semiconductor. According to the researchers, this choice of the semiconductor is to avoid the quantum tunnelling effects. As the electrons have higher resistance when flowing through molybdenum disulphide, which also has a lower dielectric constant, they have proved that the flow of electrons can even be controlled at 1 nm size (effective channel length of ~3.9 nm in the off state and ~1 nm in the on state).
While this breakthrough is now a proof of concept, further improvements to make it possible to integrate it into chips for viable computing will be one heck of an achievement.
This post was first published on October 7, 2016.